In conventional semiconductor processing, discrete diffusion regions are typically formed in a semiconductor substrate and then discrete gate electrodes structures are aligned and patterned relative to them. For example, referring to FIG. 1, which shows a top-down view of a partially fabricated semiconductor device 100, discrete patterned diffusion regions 106, 108A, 108B, 110, and 112, are formed in/over a semiconductor substrate 114. Then, as shown in FIG. 2, discrete patterned gate electrode structures 202A, 202B, 204A, 204B, 204C, 206A, 206B, 206C, 208A and 208B are aligned and perpendicularly patterned to the discrete patterned diffusion regions.
Proper x-axis and y-axis alignment of gate electrodes relative to the diffusion regions is an important consideration with respect to transistor operation and yield. For example, an inability to align the gate electrode 208B (in FIG. 2) to the diffusion region 112 along the x-axis could result in problems with the poly end cap 224 not extending completely over the diffusion region 112. To the extent that misalignment is severe, transistor operation, reliability and yield can all be affected.
One possible solution for reducing the occurrence of gate electrode/diffusion region misalignment includes increasing the length of the gate electrode 208B to insure that more of poly end cap 224 is available to overlap the diffusion region 112. However, this solution may be undesirable because it imposes a limit on the ultimate scalability of the device. In other words, to the extent that gate electrodes lengths are increased, spaces 220 between adjacent gate electrodes must also be increased to reduce the likelihood of encountering problems wherein the gate electrode 208A overlaps onto adjacent transistor regions. As semiconductor scaling continues, conventional patterning limitations such as these have the potential to limit the overall reliability, yield, and scalability semiconductor devices.
It will be appreciated that for simplicity and clarity of illustration, elements illustrated in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements are exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the drawings to indicate corresponding or analogous elements.